The vias are depressions in the substrate for connecting electrically conductive structures on one side of the substrate to electrically conductive structures arranged on the other side of the substrate. In this way, three-dimensional components can be produced, for example MCPs (multi-chip packages) or MEMSs (microelectromechanical systems).
The vias may be formed as openings which make it possible to connect one side of the substrate to the other, or as blind holes which form a connection from one side of the substrate to a component which is arranged on the other side and which closes the via. The electrical contacting is provided by an electrically conductive layer (for example of copper) located on the wall of the via.
To shield and/or electrically insulate this electrically conductive layer, an electrically insulating material may be applied to the substrate. Said material covers the electrical conductors on the substrate and also fills up the vias.
For subsequent treatment steps, it is desirable for the electrically insulating material to have as flat and planar a surface as possible. A surface of this type is not simple to achieve, in particular in the region of the vias, since the vias have a very large depth by comparison with the diameter, meaning that they can only be filled poorly with the electrically insulating material.
Various approaches for coating a substrate provided with vias uniformly with an electrically insulating material are known in the art. WO 2010/023156 A1 discloses a method in which the substrate is vibrated, assisting the electrically insulating material in flowing into the vias and completely filling them up.
U.S. Pat. No. 5,993,546 discloses a method in which a coating applied to a substrate is subjected to a high pressure in order for the coating to flow into the vias.
However, it has been found that all of these approaches either fail to produce the desired result or are technically complex.
The object of the invention is to provide a method for coating a substrate with an electrically insulating material in which vias provided in the substrate are filled up with the electrically insulating material in such a way that the insulating material has as flat a surface as possible.